Objective of this lab:

	To verify combinational design procedures by testing designed circuits.

Preparation

	Read lab lecture notes which contains the Combinational Design Procedure.

	Watch this Logisim Tutorial to leanrn the basic compunents you need so far.

Lab Assignments

1. Design and implement a 4-input majority detector. (This part will be marked.)
   • The output is high if two or more of the inputs are high.
   • Use Karnaugh map reduction to get the simplified Boolean function.
   • Draw the circuit and simulate the circuit in Logisim.
   • If you have problems using Logisim, make sure you ask for help.
   • Check if the truth table for the circuit meets the result of your experiment.
   • For your lab assignment, make sure that you follow the combinational design procedures stated in the lab notes.
     Marks will be given to each step.
   Hand-in requirements for grading
   • Show the five steps (stated in the lab notes) used to solve this problem.
     
   • Note: Step 5 includes drawing the logic diagram and implementing the test circuit in Logisim.
     Remember to do screenshot of your circuit and insert the image in lab2.pdf file.
   Please note:
   To make it easier for marking, you are required to submit the following files:
   1. One .pdf file and one .circ file, they contain all the required components for the lab assignment.
   2. Missing any one of the files (.pdf or .circ files) you will get zero for the assignment.
   3. Submitting with other file format such as .zip or .doc, you will lose 5 marks.
   4. This will apply to Lab #1 to Lab #5.

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   Copyright: Department of Computer Science, University of Regina.