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CS201 Lab: Combinational Design

Objective of this lab:


	To verify combinational design procedures by testing designed circuits.

Preparation


	Read lab lecture notes which contains the Combinational Design Procedure.

	Watch this Logisim Tutorial to leanrn the basic compunents you need so far.

Lab Assignments

Please note:
To make it easier for marking, you are required to submit
one .pdf file and one .circ file, they will contain all the required components for the lab assignment.
This will apply to Lab #1 to Lab #6.
  1. Design and implement a 4-input majority detector. (This part will be marked.)
    • The output is high if two or more of the inputs are high.
    • Use Karnaugh map reduction to get the simplified Boolean function.
    • Draw the circuit and simulate the circuit in Logisim.
    • If you have problems using Logisim, make sure you ask for help.
    • Check if the truth table for the circuit meets the result of your experiment.
    • For your lab assignment, make sure that you follow the combinational design procedures stated in the lab notes.
      Marks will be given to each step.
    Hand-in requirements for grading
    • Show the five steps (stated in the lab notes) used to solve this problem.
      Note: Step 5 includes drawing the logic diagram and implementing the test circuit in Logisim.
      Remember to do screenshot of your circuit and insert the image in lab2.pdf file.

  2. Design a circuit which will control LED segment "c" of a 7-Segment display.
    • See the diagram below to understand what a "c" segment is.
    • If the segment is lit, then the output should be 1. If the segment is not lit, then the output should be 0.
    • For example, for the numbers 0, 3, and 4, segment "c" should be lit;
      for numbers 1, and 2, segment "c" should not be lit; etc.
    • Design the circuit so that if someone applies a value from 10 to 15 then the LED segment does not light.

      The following guidelines apply to the 2nd part of the lab assignment:

    • You may only use NAND and NOT gates (it is common to have your design limited to certain gates).
    • Show all the steps of the combinational design procedure including test results.
    • Present the simplified SOP form after using the Karnaugh map reduction method.
    • Present the expression that can be implemented by using NAND and NOTgates.
    • Present the screenshot of the circuit when inputs are 1, 3, 9 and 11.
    • A 7-segment display can display the digits 0 - 9 by having the appropriate LEDs turned on.

    Hand-In requirements for grading
    • The five steps (stated in the lab notes) used to solve this problem
      (Remember the two expressions are needed.)
    • Screenshot of the circuit when input is 1, 3, 9, and 11
      Remember to insert the screenshots in the lab2.pdf file for submission.


    Please note:
    To make it easier for marking, you are required to submit
    one .pdf file and one .circ file, they will contain all the required components for the lab assignment.
    This will apply to Lab #1 to Lab #6.



Copyright: Department of Computer Science, University of Regina.